TMS320C6413ZTS500

Fixed-Point Digital Signal Processor, 288-Pin BGA, 3.3V, 500MHz

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Price:: US $31.75~31.75 / piece [Get Latest Price]

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PartNumber:: TMS320C6413ZTS500

Brand:: Texas Instruments - TI | Pack: BGA | D/C: 11+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-07-16

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Product Summary

The TMS320C6413ZTS500 is a Fixed-Point Digital Signal Processor. It is based on the second-generation high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture (VelociTI.2) developed by Texas Instruments (TI). The TMS320C6413ZTS500 enables customers to reduce system costs for telecom, medical, industrial, office, and photo lab equipment. The C64x is a code-compatible member of the C6000 DSP platform. The TMS320C6413ZTS500 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals.

Parametrics

TMS320C6413ZTS500 absolute maximum ratings: (1)Supply voltage ranges: CVDD: -0.3 V to 1.8 V, DVDD: -0.3 V to 4 V; (2)Input voltage range: VI: -0.3 V to 4 V; (3)Output voltage range: VO: -0.3 V to 4 V; (4)Operating case temperature range, TC: (default): 0℃ to 90℃, (A version) [GTSA and ZTSA]: 40℃ to 105℃; (5)Storage temperature range, Tstg: -65℃ to 150℃; (6)Package Temperature Cycling: Temperature Range: -40℃ to 125℃.

Features

TMS320C6413ZTS500 features: (1)High-Performance Fixed-Point Digital Signal Processor; (2)VelociTI.2 Extensions to VelociTI Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x DSP Core; (3)Instruction Set Features; (4)VelociTI.2 Extensions to VelociTI Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x DSP Core; (5)Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels); (6)Host-Port Interface (HPI) [32-/16-Bit]; (7)Two Multichannel Audio Serial Ports(McASPs) - with Six Serial Data Pins each; (8)Two Inter-Integrated Circuit (I2C) Buses - Additional GPIO Capability; (9)Two Multichannel Buffered Serial Ports; (10)Three 32-Bit General-Purpose Timers; (11)Sixteen General-Purpose I/O (GPIO) Pins; (12)Flexible PLL Clock Generator; (13)On-Chip Fundamental Oscillator; (14)IEEE-1149.1 (JTAG) Boundary-Scan-Compatible.