Product Summary
The MT58L64L32FT-10A is a flow-through syncburst SRAM. It employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The MT58L64L32FT-10A integrates a 128K x 18, 64K x 32, or 64K x 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input (CLK).
Parametrics
MT58L64L32FT-10A absolute maximum ratings: (1)Voltage on VDD Supply: Relative to VSS:-0.5V to +4.6V; (2)Voltage on VDDQ Supply: Relative to VSS:-0.5V to +4.6V; (3)VIN:-0.5V to VDDQ + 0.5V; (4)Storage Temperature (plastic):-55℃ to +150℃; (5)Junction Temperature:+150℃; (6)Short Circuit Output Current:100mA.
Features
MT58L64L32FT-10A features: (1)Fast clock and OE# access times; (2)Single +3.3V +0.3V/-0.165V power supply (VDD); (3)Separate +3.3V or +2.5V isolated output buffer supply (VDDQ); (4)SNOOZE MODE for reduced-power standby; (5)Common data inputs and data outputs; (6)Individual BYTE WRITE control and GLOBAL WRITE; (7)Three chip enables for simple depth expansion and address pipelining; (8)Clock-controlled and registered addresses, data I/Os and control signals; (9)Internally self-timed WRITE cycle; (10)Burst control pin (interleaved or linear burst); (11)Automatic power-down; (12)100-pin TQFP package; (13)Low capacitive bus loading; (14)x18, x32, and x36 versions available.
Diagrams
MT58L128L18D |
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Negotiable |
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MT58L128L18F, |
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Negotiable |
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MT58L128L32D1 |
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Negotiable |
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MT58L128L36D1 |
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Negotiable |
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MT58L1MY18D |
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Negotiable |
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MT58L256L18D1 |
Other |
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Negotiable |
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