Product Summary

The SN74CBTLV3126PW is a quadruple FET bus switch. The SN74CBTLV3126PW features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low. The SN74CBTLV3126DRG4 is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The SN74CBTLV3126PW has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Parametrics

SN74CBTLV3126PW absolute maximum ratings: (1)Supply voltage range, VCC: -0.5 V to 4.6 V; (2)Input voltage range, VI: -0.5 V to 4.6 V; (3)Continuous channel current: 128 mA; (4)Input clamp current, IIK (VI/O < 0): -50 mA; (5)Package thermal impedance, θJA: D package 86℃/W, DBQ package 90℃/W, DGV package 127℃/W, PW package 113℃/W, RGY package 47℃/W; (6)Storage temperature range, Tstg: -65℃ to 150℃.

Features

SN74CBTLV3126PW features: (1)Standard 126-Type Pinout; (2)5-Ω Switch Connection Between Two Ports; (3)Rail-to-Rail Switching on Data I/O Ports; (4)Ioff Supports Partial-Power-Down Mode Operation; (5)Latch-up Performance Exceeds 100 mA per JESD 78, Class II.

Diagrams

SN74CBTLV3126PW circuit diagram

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SN74CBTLV3126PW
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Data Sheet

0-1: $0.52
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