(China (Mainland))
Product Summary
The SN74LV08APWR is a quadruple 2-input positive-AND gate. It is designed for 2-V to 5.5-V VCC operation. The SN74LV08APWR performd the Boolean function Y = A · B or Y = A + B in positive logic. The SN74LV08APWR is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Parametrics
SN74LV08APWR (1)Supply voltage range, VCC: -0.5 V to 7 V; (2)Input voltage range, VI: -0.5 V to 7 V; (3)Voltage range applied to any output in the high-impedance or power-off state, VO: -0.5 V to 7 V; (4)Output voltage range, VO: -0.5 V to VCC + 0.5 V; (5)Input clamp current, IIK (VI < 0): -20 mA; (6)Output clamp current, IOK (VO < 0): -50 mA; (7)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (8)Continuous current through VCC or GND: ±50 mA; (9)Storage temperature range, Tstg: -65℃ to 150℃.
Features
SN74LV08APWR features: (1)2-V to 5.5-V VCC Operation; (2)Max tpd of 7 ns at 5 V; (3)Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25℃; (4)Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25℃; (5)Support Mixed-Mode Voltage Operation on All Ports; (6)Ioff Supports Partial-Power-Down Mode Operation; (7)Latch-Up Performance Exceeds 250 mA Per JESD 17; (8)ESD Protection Exceeds JESD 22.
Diagrams
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 SN74LV08APWR |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quad 2-Input. |
Data Sheet |
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SN74LV08APWRE4 |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quadruple 2-Input Positive-AND Gates |
Data Sheet |
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SN74LV08APWRG3 |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quad 2-In Pos-AND Gate |
Data Sheet |
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SN74LV08APWRG4 |
Texas Instruments |
Gates (AND / NAND / OR / NOR) Quadruple 2-Input Positive-AND Gates |
Data Sheet |
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