SN74AHCT74D

SN74AHCT74D, dual positive-edge-triggered D-type flip-flop, SOP14, -0.5V to 7V, ±20 mA, ±50 mA

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Price:: US $0.08~0.08 / piece [Get Latest Price]

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PartNumber:: SN74AHCT74D

Brand:: Texas Instruments - TI | Pack: SOP | D/C: 11+

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Products Upload time: 2012-08-11

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Part Number:SN74AHCT74D
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Product Summary

The SN74AHCT74D is a dual positive-edge-triggered D-type flip-flop with clear and preset. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

Parametrics

SN74AHCT74D absolute maximum ratings: (1)Supply voltage range, VCC:-0.5 V to 7 V; (2)Input voltage range, VI:-0.5 V to 7 V; (3)Output voltage range, VO: -0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI＜0): -20 mA; (5)Output clamp current, IOK (VO＜ 0 or VO＞ VCC): ±20 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (7)Continuous current through VCC or GND: ±50 mA; (8)Package thermal impedance, θJA: D package: 86℃/W; (9)DB package: 96℃/W; (10)DGV package: 127℃/W; (11)N package: 80℃/W; (12)NS package: 76℃/W; (13)PW package: 113℃/W; (14)RGY package: 47℃/W; (15)Storage temperature range, Tstg: -65℃ to 150℃.

Features

SN74AHCT74D features: (1)Inputs Are TTL-Voltage Compatible; (2)Latch-Up Performance Exceeds 250 mA Per JESD 17; (3)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101).