Product Summary
The MC14049UBFELG hex inverter/buffer is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. The MC14049UBFELG provides logic–level conversion using only one supply voltage, VDD. The input–signal high level (VIH) can exceed the VDD supply voltage for logic–level conversions. Two TTL/DTL Loads can be driven when the MC14049UBFELG is used as CMOS–to–TTL/DTL converters (VDD = 5.0 V, VOL=0.4 V, IOL=3.2 mA). Note that pins 13 and 16 are not connected internally on this device; consequently connections to these terminals will not affect circuit operation.
Parametrics
MC14049UBFELG absolute maximum ratings: (1)DC Supply Voltage Range: –0.5 to +18.0 V; (2)Voltage Range (DC or Transient): –0.5 to +18.0 V; (3)Output Voltage Range (DC or Transient): –0.5 to VDD +0.5 V; (4)Iin Input Current (DC or Transient) per Pin: ±10 mA; (5)Output Current (DC or Transient) per Pin: +45 mA; (6)Power Dissipation, per Package: Plastic: 825 mW, SOIC: 740 mW; (7)Ambient Temperature Range: –55 to +125 ℃; (8)Storage Temperature Range: –65 to +150 ℃; (9)Lead Temperature (8–Second Soldering): 260 ℃.
Features
MC14049UBFELG features: (1)High Source and Sink Currents; (2)High-to-low Level Converter; (3)Supply Voltage Range = 3.0 V to 18 V; (4)Meets JEDEC UB Specifications; (5)VIN can exceed VDD; (6)Improved ESD Protection on All Inputs.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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MC14049UBFELG |
ON Semiconductor |
Buffers & Line Drivers 3-18V Hex CMOS Buffer |
Data Sheet |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||||||
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